Open risc-v-chip from china should approach arm cortex-a76

Open RISC-V-chip from China should approach Arm Cortex-A76

The Chinese Academy of Science (Chinese Academy of Science, CAS) develops the Xiangshan processor with the ordered command set architecture RISC-V. On a RISC-V conference in China, a prototype from the 28-nanometer manufacturing of TSMC has been presented, which is currently 1.2 to 1.3 GHz.

Thanks to compatibility with the RISC-V specification RV64GC, Xiangshan (香山) also runs under Linux; Shots about Canonical (server) versions of Ubuntu 20.04.2 LTS and Ubuntu 21.04 For RISC-V-BOARDS from Sifive as Hifive Unmatched.

An upcoming version of the Xiangshan is intended to produce the Chinese assembly-ready SMIC with 14 nanometer structures; Tact frequencies are planned by 2 GHz.

Further improved Xiangshan versions should then achieve the computing power of an ARM Cortex-A76; The latter is approximately in the Qualcomm Snapdragon 8CX, which in turn uses Microsoft in the arm Windows notebooks Surface Pro X.

The Xiangshan should drive up to 32 GB of DDR4-RAM and has a PCIe-3.0-x4 port.

Disclosed documentation

The Institute of Computing Technology of CAS (ICT CAS) is a member of the RISC-V Foundation. Bao Yungang (包云岗) leads the research center for Advanced Computer Systems (ACS) at ICT CAS and has its presentation on the Chinese website Zhihu.Comment. In addition, the design of Xiangshan is disclosed and documented at Github.

Whether and when the finished RISC V-chip will be used in systems, but is unclear.

Like this post? Please share to your friends:
Leave a Reply

;-) :| :x :twisted: :smile: :shock: :sad: :roll: :razz: :oops: :o :mrgreen: :lol: :idea: :grin: :evil: :cry: :cool: :arrow: :???: :?: :!: